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19-4796; Rev 1; 6/00
KIT ATION EVALU BLE AVAILA
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs
General Description
The MAX3266 is a transimpedance preamplifier for 1.25Gbps local area network (LAN) fiber optic receivers. The circuit features 200nA input-referred noise, 920MHz bandwidth, and 1mA input overload. The MAX3267 provides a pin-for-pin compatible solution for communications up to 2.5Gbps. It features 500nA input-referred noise, 1.9GHz bandwidth, and 1mA input overload. Both devices operate from a +3.0V to +5.5V single supply and require no compensation capacitor. They also include a space-saving filter connection that provides positive bias for the photodiode through a 1.5k resistor to VCC. These features allow easy assembly into a TO-46 or TO-56 header with a photodiode. The 1.25Gbps MAX3266 has a typical optical dynamic range of -24dBm to 0dBm in a shortwave (850nm) configuration or -27dBm to -3dBm in a longwave (1300nm) configuration. The 2.5Gbps MAX3267 has a typical optical dynamic range of -21dBm to 0dBm in a shortwave configuration or -24dBm to -3dBm in a longwave configuration.
Features
o 200nA Input-Referred Noise (MAX3266) 500nA Input-Referred Noise (MAX3267) o 920MHz Bandwidth (MAX3266) 1900MHz Bandwidth (MAX3267) o 1mA Input Overload o +3.0V to +5.5V Single-Supply Voltage
MAX3266/MAX3267
Ordering Information
PART MAX3266CSA MAX3266C/D MAX3267CSA MAX3267C/D MAX3267ESA MAX3267E/D TEMP. RANGE 0C to +70C -- 0C to +70C -- -40C to +85C -- PIN-PACKAGE 8 SO Dice* 8 SO Dice* 8 SO Dice*
*Dice are designed to operate over a -40C to +140C junction temperature (Tj) range, but are tested and guaranteed at TA = +25C.
Pin Configuration
TOP VIEW
VCC 1 8 7 GND OUT+ OUTGND
Applications
Gigabit Ethernet 1Gbps to 2.5Gbps Optical Receivers Fibre Channel
N.C. IN
2 3
MAX3266 MAX3267
6 5
FILTER 4
SO
Typical Application Circuit
VCC 0.01F 1.5k CFILTER 400pF FILTER PHOTODIODE IN OUT+ 100 OUT-
VCC 0.1F
MAX3266 MAX3267
GND
0.1F
LIMITING AMPLIFIER
________________________________________________________________ Maxim Integrated Products
1
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC - GND) .................................-0.5V to +6.0V IN Current..............................................................-4mA to +4mA FILTER Current......................................................-8mA to +8mA Voltage at OUT+, OUT- ...................(VCC - 1.5V) to (VCC + 0.5V) Continuous Power Dissipation (TA = +70C) 8-Pin SO (derate 6.7mW/C above +70C)..................533mW Storage Temperature Range .............................-55C to +150C Operating Junction Temperature (die) ..............-55C to +150C Processing Temperature (die) .........................................+400C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS--MAX3266C/MAX3267C
(VCC = +3.0V to +5.5V, TA = 0C to +70C, 100 load between OUT+ and OUT-. Typical values are at TA = +25C, VCC = 3.3V, source capacitance = 0.85pF, unless otherwise noted.) (Note 1) PARAMETER Input Bias Voltage Supply Current Transimpedance Output Impedance Maximum Differential Output Voltage Filter Resistor AC Input Overload DC Input Overload Die, packaged in TO-56 header (Note 2) Input-Referred RMS Noise SO package (Note 2) Input-Referred Noise Density Small-Signal Bandwidth Low-Frequency Cutoff Transimpedance Linear Range Deterministic Jitter Power-Supply Rejection Ratio (PSRR) (Note 2) MAX3266 MAX3267 -3dB, input 20A DC Peak-to-peak, 0.95 < linearity < 1.05 (Note 3) MAX3266 MAX3267 MAX3266 MAX3267 30 40 19 12 50 76 50 MAX3266 MAX3266 MAX3267 MAX3266 MAX3267 750 1530 Differential, measured with 30Ap-p signal (40Ap-p for MAX3267) Single ended (per side) Input = 1mAp-p MAX3266 MAX3267 2260 1540 48 185 1220 1.0 0.65 192 200 485 6.6 11.0 920 1900 44 1100 2420 655 pA/(Hz)1/2 MHz kHz Ap-p ps ps dB 256 nA CONDITIONS MIN 0.69 TYP 0.83 26 2800 1900 50 250 1500 MAX 0.91 50 3400 2330 52 415 1860 mVp-p mAp-p mA UNITS V mA
Output referred, f < 2MHz, PSRR = -20log (VOUT/VCC)
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs
ELECTRICAL CHARACTERISTICS--MAX3267E
(VCC = +3.0V to +5.5V, TA = -40C to +85C, 100 load between OUT+ and OUT-. Typical values are at TA = +25C, VCC = 3.3V, source capacitance = 0.85pF, unless otherwise noted.) (Note 1) PARAMETER Input Bias Voltage Supply Current Transimpedance Output Impedance Maximum Differential Output Voltage Filter Resistor AC Input Overload DC Input Overload Input-Referred RMS Noise Input-Referred Noise Density Small-Signal Bandwidth Low-Frequency Cutoff Transimpedance Linear Range Deterministic Jitter Power-Supply Rejection Ratio (PSRR) -3dB, input 20A DC Peak-to-peak, 0.95 < linearity < 1.05 (Note 3) Output referred, f < 2MHz, PSRR = -20log (VOUT/VCC) 40 14 50 50 SO package (Note 2) (Note 2) 1515 Differential, measured with 40Ap-p signal Single ended (per side) Input = 1mAp-p 1470 47.7 155 1210 1.0 0.65 485 11.0 1900 24 2550 668 CONDITIONS MIN 0.67 TYP 0.83 26 1900 50 250 1500 MAX 0.97 53.2 2355 52.1 430 1865 UNITS V mA mVp-p mAp-p mA nA pA/(Hz)1/2 MHz kHz Ap-p ps dB
MAX3266/MAX3267
Note 1: Source Capacitance represents the total capacitance at the IN pin during characterization of noise and bandwidth parameters. Figure 1 shows the typical source capacitance vs. reverse voltage for the photodiode used during characterization of TO-56 header packages. Noise and bandwidth will be affected by the source capacitance. See the Typical Operating Characteristics for more information. Note 2: Input-Referred Noise is calculated as RMS Output Noise / (Gain at f = 10MHz). Noise Density is (Input-Referred Noise) / bandwidth. No external filters are used for the noise measurements. Note 3: Deterministic Jitter is measured with the K28.5 pattern applied to the input [00111110101100000101].
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
Typical Operating Characteristics
(VCC = +3.3V, TA = +25C, MAX3266/MAX3267 EV kit, source capacitance = 0.85pF, unless otherwise noted.)
MAX3266 INPUT-REFERRED NOISE vs. TEMPERATURE
MAX3266/67-01
MAX3267 INPUT-REFERRED NOISE vs. TEMPERATURE
MAX3266/67-02
FREQUENCY RESPONSE
MAX3266 70 TRANSIMPEDANCE (dB)
MAX3266/67-03
250 240 INPUT-REFERRED NOISE (nA) 230 220 210 200 190 180 170 0
INPUT-REFERRED NOISE (nA)
CIN IS SOURCE CAPACITANCE PRESENTED TO DIE, INCLUDING PACKAGE PARASITIC, PIN DIODE, AND PARASITIC INTERCONNECT CAPACITANCE.
650 600 550 500 450 400 350
CIN IS SOURCE CAPACITANCE PRESENTED TO DIE, INCLUDING PACKAGE PARASITIC, PIN DIODE, AND PARASITIC INTERCONNECT CAPACITANCE.
75
65 MAX3267
60
CIN = 1.0pF CIN = 1.5pF 25 50
CIN = 0.5pF
CIN = 1.5pF CIN = 1.0pF -50 -25 0 25 50
CIN = 0.5pF
55
50 75 100 1M 10M 100M FREQUENCY (Hz) 1G 10G JUNCTION TEMPERATURE (C)
75
100
JUNCTION TEMPERATURE (C)
DETERMINISTIC JITTER vs. INPUT AMPLITUDE
MAX3266/67-04
INPUT-REFERRED RMS NOISE CURRENT vs. DC INPUT CURRENT
MAX3266/67-05
SMALL-SIGNAL TRANSIMPEDANCE vs. TEMPERATURE
69 68 TRANSIMPEDANCE (dB) 67 66 65 64 63 62 MAX3267 MAX3266
MAX3266/67-06
100 90 PEAK-TO-PEAK JITTER (ps) 80 70 60 50 40 30 20 10 0 10 MAX3266 100 PEAK-TO-PEAK AMPLITUDE (A) MAX3267
1000 900 INPUT-REFERRED NOISE (nA) 800 700 600 500 400 300 200 100 0 MAX3266 1 10 100 MAX3267
70
61 1000 60 -50 -25 0 25 50 75 100 AMBIENT TEMPERATURE (C)
1000
DIFFERENTIAL DC INPUT CURRENT (A)
MAX3266 BANDWIDTH vs. TEMPERATURE
MAX3266/67-07
MAX3267 BANDWIDTH vs. TEMPERATURE
MAX3266/67-08
OUTPUT AMPLITUDE vs. TEMPERATURE
MAX3266/67-09
1090 1040 BANDWIDTH (MHz) 990 940
BANDWIDTH (MHz)
AMPLITUDE (mV) 100
CIN IS SOURCE CAPACITANCE PRESENTED TO DIE, INCLUDING PACKAGE PARASITIC, PIN DIODE, AND PARASITIC INTERCONNECT CAPACITANCE.
2400
350 300 250 200 150 100 50 0 -50 -25 0 25 50 75
CIN IS SOURCE CAPACITANCE 2300 PRESENTED TO DIE, INCLUDING PACKAGE PARASITIC, PIN DIODE, 2200 AND PARASITIC INTERCONNECT CAPACITANCE. 2100 CIN = 0.5pF 2000 1900 1800 1700 CIN = 1.0pF CIN = 1.5pF -25 0 25 50 75 JUNCTION TEMPERATURE (C)
CIN = 0.5pF 890 840 790 740 0 25 50 75 100 JUNCTION TEMPERATURE (C) CIN = 1.0pF
CIN = 1.5pF
1600 1500 -50
100
AMBIENT TEMPERATURE (C)
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25C, MAX3266/MAX3267 EV kit, source capacitance = 0.85pF, unless otherwise noted.)
EYE DIAGRAM (INPUT = 10Ap-p)
MAX3266/67-10
EYE DIAGRAM (INPUT = 1mAp-p)
MAX3266/67-11
EYE DIAGRAM (INPUT = 20Ap-p)
INPUT: 27-1 PRBS
MAX3266/67-12
4mV/div
30mV/div
5mV/div
INPUT: 27-1 PRBS 160ps/div
INPUT: 27-1 PRBS 160ps/div 80ps/div
EYE DIAGRAM (INPUT = 1mAp-p)
INPUT: 27-1 PRBS
MAX3266/67-13
DC TRANSFER FUNCTION
MAX3266/67-14
150 100 OUTPUT VOLTAGE (mVp-p) 50 MAX3266 0 -50 -100 -150 MAX3267
30mV/div
80ps/div
-200 -150 -100 -50
0
50
100 150 200
INPUT CURRENT (A)
Pin Description
PIN 1 2 3 4 5 6 7 8 NAME VCC N.C. IN FILTER GND OUTOUT+ GND Supply Voltage No Connection. Not internally connected. Amplifier Input Provides bias voltage for the photodiode through a 1.5k resistor to VCC. When grounded, this pin disables the DC Cancellation Amplifier to allow a DC path from IN to OUT+ and OUT- for testing. Ground Inverting Output. Current flowing into IN causes VOUT- to decrease. Noninverting Output. Current flowing into IN causes VOUT+ to increase. Ground FUNCTION
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
Detailed Description
The MAX3266 is a transimpedance amplifier designed for 1.25Gbps fiber optic applications. Figure 2 is a functional diagram of the MAX3266, which comprises a transimpedance amplifier, a voltage amplifier, an output buffer, an output filter, and a DC cancellation circuit. The MAX3267, a transimpedance amplifier designed for 2.5Gbps fiber optic applications, shares similar architecture with the MAX3266.
MAX3266/67 fig01
Transimpedance Amplifier
The signal current at the input flows into the summing node of a high-gain amplifier. Shunt feedback through RF converts this current to a voltage with gain of approximately 2.2k (1.0k for MAX3267). Schottky diodes clamp the output voltage for large input currents, as shown in Figure 3.
Voltage Amplifier
The voltage amplifier converts single-ended signals to differential signals and introduces a voltage gain.
2.00 1.85 1.70 CAPACITANCE (pF) 1.55 1.40 1.25 1.10 0.95 0.80 0.65 0.50 0 1 2 3 4 5 REVERSE BIAS (V)
Output Buffer
The output buffer provides a reverse-terminated voltage output. The buffer is designed to drive a 100 differential load between OUT+ and OUT-. The output current is divided between internal 50 load resistors and the external load resistor. In the typical operating circuit, this creates a voltage-divider with gain of 1/2. The MAX3266 can also be terminated with higher output impedances, which increases gain and output voltage swing. For optimum supply-noise rejection, the MAX3266 should be terminated with a differential load. If a singleended output is required, the unused output should be similarly terminated. The MAX3266 will not drive a DCcoupled, 50 grounded load.
Figure 1. Typical Photodiode Capacitance vs. Bias Voltage
MAX3266
RF TRANSIMPEDANCE AMPLIFIER IN 50 VOLTAGE AMPLIFIER OUTPUT BUFFER OUTPUT FILTER OUT+ OUT-
50
LOWPASS FILTER VCC DISABLE 1.5k FILTER DC CANCELLATION CIRCUIT
VCC GND
Figure 2. MAX3266 Functional Diagram 6 _______________________________________________________________________________________
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
AMPLITUDE AMPLITUDE INPUT FROM PHOTODIODE
TIME TIME OUTPUT (SMALL SIGNALS) OUTPUT (LARGE SIGNALS) INPUT (AFTER DC CANCELLATION)
Figure 3. MAX3266 Limited Output
Figure 4. DC Cancellation Effect on Input
Output Filter
The MAX3266 includes a one-pole lowpass filter that limits the circuit bandwidth and improves noise performance.
relations that are helpful for converting optical power to input signal when designing with the MAX3266. Optical power relations are shown in Table 1; the definitions are true if the average duty cycle of the input data is 50%.
DC Cancellation Circuit
The DC cancellation circuit uses low-frequency feedback to remove the DC component of the input signal (Figure 4). This feature centers the input signal within the transimpedance amplifier's linear range, thereby reducing pulse-width distortion on large input signals. The DC cancellation circuit is internally compensated and therefore does not require external capacitors. This circuit minimizes pulse-width distortion for data sequences that exhibit a 50% duty cycle. A duty cycle significantly different from 50% will cause the MAX3266 to generate pulse-width distortion. DC cancellation current is drawn from the input and creates noise. For low-level signals with little or no DC component, this is not a problem. Amplifier noise will increase for signals with significant DC component (see Typical Operating Characteristics).
Optical Sensitivity Calculation
The input-referred RMS noise current (I N ) of the MAX3266 generally determines the receiver sensitivity. To obtain a system bit error rate (BER) of 1E-12, the SNR ratio must always exceed 14.1. The input sensitivity, expressed in average power, can be estimated as: 14.1 I r + 1 Ne 1000 dBm Sensitivity = 10 log 2 r - 1
(e
(
)
)
Where is the photodiode responsivity in A/W.
Input Optical Overload
The overload is the largest input that the MAX3266 accepts while meeting specifications. The optical overload can be estimated in terms of average power with the following equation: 1mA Overload = 10 log 1000 dBm 2
Applications Information
Optical Power Relations
Many of the MAX3266 specifications relate to the input signal amplitude. When working with fiber optic receivers, the input is usually expressed in terms of average optical power and extinction ratio. Figure 5 shows
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
PI
PAVG
PO
TIME
Figure 5. Optical Power Relations
Noise performance and bandwidth will be adversely affected by capacitance at the IN pin. Minimize capacitance on this pin and select a low-capacitance photodiode. Assembling the MAX3266 in die form using chip and wire technology provides the best possible performance. Figure 6 shows a suggested layout for a TO header. The SO package version of the MAX3266 is offered as an easy way to characterize the circuit and become familiar with the circuit's operation, but it does not offer optimum performance. When using the SO version of the MAX3266, the package capacitance adds approximately 0.3pF at the input. The PC board between the MAX3266 input and the photodiode also adds parasitic capacitance. Keep the input line short, and remove power and ground planes beneath it.
OPTICAL POWER
Table 1. Optical Power Relations
PARAMETER Average Power Extinction Ratio Optical Power of a 1 Optical Power of a 0 Signal Amplitude SYMBOL PAVG re P1 RELATION PAVG = (P0 + P1) / 2 re = P1/P0 P1 = 2PAVG (re) / (re + 1)
Photodiode Filter
Supply voltage noise at the cathode of the photodiode produces a current I = CPD V/t, which reduces the receiver sensitivity (C PD is the photodiode capacitance.) The filter resistor of the MAX3266, combined with an external capacitor, can be used to reduce this noise (see the Typical Application Circuit). Current generated by supply noise voltage is divided between CFILTER and CPD. The input noise current due to supply noise is (assuming the filter capacitor is much larger than the photodiode capacitance): INOISE = (VNOISE)(CPD) / (RFILTER)(CFILTER) If the amount of tolerable noise is known, the filter capacitor can be easily selected: CFILTER = (VNOISE)(CPD) / (RFILTER)(INOISE)
P0
P0 = 2PAVG / (re + 1)
PIN
PIN = P1 - P0 = 2PAVG (re) / (re + 1)
Optical Linear Range
The MAX3266 has high gain, which limits the output when the input signal exceeds 30Ap-p (40Ap-p for MAX3267). The MAX3266 operates in a linear range for inputs not exceeding: 30A re + 1 1000 dBm Linear Range = 10log 2 re - 1
For example, with maximum noise voltage = 100mVp-p, CPD = 0.85pF, RFILTER = 1.5k, and INOISE selected to be 100nA (1/2 of the MAX3266's input noise): CFILTER = (100mV)(0.85pF) / (1500)(100nA) = 570pF
(
(
)
)
Wire Bonding
For high current density and reliable operation, the MAX3266 uses gold metalization. Connections to the die should be made with gold wire only, using ballbonding techniques. Wedge bonding is not recommended. Die thickness is typically 15mils (0.375mm).
Layout Considerations
Use good high-frequency design and layout techniques. The use of a multilayer circuit board with separate ground and power planes is recommended. Connect the GND pins to the ground plane with the shortest possible traces.
8
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
TOP VIEW OF TO-56 HEADER
CFILTER
VCC
PHOTODIODE
OUT-
OUT+
MAX3266/MAX3267 CASE IS GROUND
Figure 6. Suggested Layout for TO-56 Header
Chip Topographies
MAX3266
FILTER INPUT VCC FILTER
MAX3267
INPUT VCC
GND
GND 0.050" (1.25mm)
GND
GND 0.050" (1.25mm)
OUT-
OUT+
OUT-
OUT+
0.030" (0.75mm)
0.030" (0.75mm)
TRANSISTOR COUNT: 320 SUBSTRATE CONNECTED TO GND
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1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs MAX3266/MAX3267
Package Information
SOICN.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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